Circuit gate?
Hi,
I need to connect a switch to a gate input, which should generate L and H levels. Is this correct?
x = 1 and 0 and at y = 0 and 1
Hi,
I need to connect a switch to a gate input, which should generate L and H levels. Is this correct?
x = 1 and 0 and at y = 0 and 1
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A gate input should always have a defined level. When it is open, the state is unpredictable and U.S. can start swinging.
A pull-down (or pull-up) resistor is usually used for this purpose.
Your question is not clear to me what needs to be generated.
What’s the entrance, and what’s the exit? In a logic circuit, there is either L or H, or even undefined.
You have drawn x as input and y as output, where y is negated by the gate.
y =! x
I’m supposed to connect a gate input to a switch to generate L and H levels. A suitable circuit is to be designed for this purpose.
Since you cannot insert a picture in the answer, I have edited the previous post and added a possible solution.
PS you have taken an ANSI representation, I am opposed to the IEC form
At least two input variables are required for an OR link. Isn’t that wrong?
Yes, there are two entrances at an OR. This is the question.
As input, the switch S, closed S=1, open S=0
S| X | Y
0 | 1
1 | 0
In your drawing you drew x and the switch one after the other, the table would be like that.
X | S
0 | 1
1
0 1 | 1
1 | 0
This is a negated AND member (NAND).
Wouldn’t it be better? https://ibb.co/k9vgqWv
What would the truth table look like?
Thank you. I think now I understand the sense of resistance in your circuit.